![]() ![]() The clock and timing arrangements have not been shown in the figure. The following steps are controlled by a clock sequentially. The arrangement is shown in Figure 5 there are two separate sets of flip-flops. ![]() This causes the voltage across the capacitor C (and hence the output voltage) to increase linearly with time.Ī bidirectional shift register is one which can do both the shift left and shift right operations. Thus the voltage drop across the resistor R also remains constant because of this, the current i R through the resistor also remains constant. Since the value of capacitor C 1 is much larger than that of capacitor C, therefore the voltage across capacitor C 1 practically remains constant. It is because of the fact that the output voltage is coupled through the capacitor C 1 to the diode. As the output voltage increases, the diode D becomes reverse biased. As a result of this, both the base voltage of Q 2 and the output voltage begins to increase from zero. Thus as the transistor Q 1 turns OFF, the capacitor C 1 starts charging this capacitor C through resistor R. ![]() Since transistor Q 2 is an emitter follower, therefore the output voltage (V o) is the same as the base voltage of transistor Q 2. When negative pulse as shown in Figure 4 is applied to the base of transistor Q 2 it turns OFF. ![]()
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |